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Support for Lacie internet space 500 Gb in openwrt

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  • With the IB4220 I have (or has) this problem to.

    I solved this with a "external" level shifter, I think this was the TX line.

    Maybe there is a problem with your USB serial (3,3V) adapter.
    Common types are PL2303 and FTDI
    Some random kernel coder
    Lots of stuff attached to serial console

    Kommentar


    • Zitat von ElektromAn Beitrag anzeigen
      With the IB4220 I have (or has) this problem to.

      I solved this with a "external" level shifter, I think this was the TX line.

      Maybe there is a problem with your USB serial (3,3V) adapter.
      Common types are PL2303 and FTDI
      Ok, I'll take the device at home and make some tests without the usb serial connected when I'll have time. I use PL2303. Thank you for your answers. How could I use the power button with openwrt? Before, the device started with pressing the power button. Now starts when power plugged, not being necessary to press the power button. I guess for the power down I have to map a GPIO in openwrt?
      Kind regards.

      Kommentar


      • Hi,

        Can you point me out where can I find or how I can make an "external" level shifter? The device doesn't boot without the serial line reading. So I guess if there would be a dummy device that fool the serial port that it is active, maybe it would boot. I don't understand, though, why it stops if no serial connected and then boots with "boot" command from serial commandline.

        Kind regards
        Zuletzt geändert von fratzicu; 22.05.2016, 20:36.

        Kommentar


        • I must check ..
          Maybe I find the circuit.

          Currently I'm using the PL2303HX with all (most) of my equipment
          Some NAS Boxes from Zyxel and some Wireless Mobile Devices from Kingston
          Some random kernel coder
          Lots of stuff attached to serial console

          Kommentar


          • Hi, dear all, I've been working lately with my device and found out that others had the same issue with booting. So if I could change u-boot bootdelay to 0, then the boot process would be fine. Somehow, I cannot saveenv

            Code:
            Marvell>> setenv bootdelay=0
            Marvell>> saveenv
            Saving Environment to Flash...
            Error: start and/or end address not on sector boundary
            Marvell>>
            I encountered here the same problem http://sequanux.org/pipermail/lacie-...ay/000473.html, but with edmini v2 http://tweaky.aribaud.net/?q=book/export/html/38 and a forum thread here http://forum.nas-central.org/viewtop...104439#p104439

            I guess if I had aaribaud's files compiled with support for ​ MX29LV400CTTC-55Q flash chip and not MX29LV400CBTC it would be ok.

            I tried aaribaud's files and
            Code:
            Marvell>> tftp 400000 u-boot-RAM.bin
            Using egiga0 device
            TFTP from server 192.168.61.109; our IP address is 192.168.61.10
            Filename 'u-boot-RAM.bin'.
            Load address: 0x400000
            Loading: #################################################################
                     #########################
            done
            Bytes transferred = 458884 (70084 hex)
            Marvell>> go 410000
            ## Starting application at 0x00410000 ...
            
            
                     __  __                      _ _
                    |  \/  | __ _ _ ____   _____| | |
                    | |\/| |/ _` | '__\ \ / / _ \ | |
                    | |  | | (_| | |   \ V /  __/ | |
                    |_|  |_|\__,_|_|    \_/ \___|_|_|
             _   _     ____              _
            | | | |   | __ )  ___   ___ | |_
            | | | |___|  _ \ / _ \ / _ \| __|
            | |_| |___| |_) | (_) | (_) | |_
             \___/    |____/ \___/ \___/ \__|  ** LOADER **
             ** MARVELL BOARD: DB-88F5182-EDmini-V2 LE
            
            
            U-Boot 1.1.1 (May 26 2008 - 11:52:05) Marvell version: 1.7.3 - LaCie version: 1.3.4
            
            
            DRAM CS[0] base 0x00000000   size  64MB
            DRAM Total size  64MB
            Flash: flashStructGet manu 0xc2 id 0xb9
            [0kB@fff80000] ## Unknown FLASH at fff80000: Size = 0x00000000 = 0 MB
            Flash:  0 kB
            Addresses 20M - 0M are saved for the U-Boot usage.
            Mem malloc Initialization (20M - 16M): Done
            *** Warning - bad CRC, using default environment
            
            
            
            
            Soc: MV88F5182 Rev 2
            CPU: ARM926 (Rev 0) running @ 400Mhz
            SysClock = 200Mhz , TClock = 166Mhz
            
            
            
            
            USB 0: host mode
            USB 1: device mode
            PCI 0: PCI Express Root Complex Interface
            PCI 1: Conventional PCI, speed = 33000000
            Net:   egiga0 [PRIME]
            Power Button Released
            Hit any key to stop autoboot:  0
            
            
            Marvell>> bdinfo
            arch_number = 0x000006DC
            env_t       = 0x00000000
            boot_params = 0x00000100
            DRAM bank   = 0x00000000
            -> start    = 0x00000000
            -> size     = 0x04000000
            DRAM bank   = 0x00000001
            -> start    = 0xFFFFFFFF
            -> size     = 0x00000000
            DRAM bank   = 0x00000002
            -> start    = 0xFFFFFFFF
            -> size     = 0x00000000
            DRAM bank   = 0x00000003
            -> start    = 0xFFFFFFFF
            -> size     = 0x00000000
            ethaddr     = 00:D0:4B:88:1C:70
            ip_addr     = 0.0.0.0
            baudrate    = 115200 bps
            
            
            
            Marvell>> tftp 500000 u-boot-FLASH.bin
            Using egiga0 device
            TFTP from server 192.168.61.109; our IP address is 192.168.61.110
            Filename 'u-boot-FLASH.bin'.
            Load address: 0x500000
            Loading: #################################################################
                     #########################
            done
            Bytes transferred = 458884 (70084 hex)
             Marvell>>reset
                     __  __                      _ _
                    |  \/  | __ _ _ ____   _____| | |
                    | |\/| |/ _` | '__\ \ / / _ \ | |
                    | |  | | (_| | |   \ V /  __/ | |
                    |_|  |_|\__,_|_|    \_/ \___|_|_|
             _   _     ____              _
            | | | |   | __ )  ___   ___ | |_
            | | | |___|  _ \ / _ \ / _ \| __|
            | |_| |___| |_) | (_) | (_) | |_
             \___/    |____/ \___/ \___/ \__|  ** LOADER **
             ** MARVELL BOARD: DB-88F5182-EDmini-V2 LE
            
            
            U-Boot 1.1.1 (Sep  3 2008 - 07:36:51) Marvell version: 1.7.3 - LaCie version: 1.3.4
            
            
            DRAM CS[0] base 0x00000000   size  64MB
            DRAM Total size  64MB
            Flash: flashStructGet manu 0xff id 0xff
            [0kB@fff80000] ## Unknown FLASH at fff80000: Size = 0x00000000 = 0 MB
            Flash:  0 kB
            Addresses 20M - 0M are saved for the U-Boot usage.
            Mem malloc Initialization (20M - 16M): Done
            *** Warning - bad CRC, using default environment
            
            
            
            
            Soc: MV88F5182 Rev 2
            CPU: ARM926 (Rev 0) running @ 400Mhz
            SysClock = 200Mhz , TClock = 166Mhz
            
            
            
            
            USB 0: host mode
            USB 1: device mode
            PCI 0: PCI Express Root Complex Interface
            PCI 1: Conventional PCI, speed = 33000000
            Net:   egiga0 [PRIME]
            Hit any key to stop autoboot:  0
            Waiting for LUMP (2)
            Using egiga0 device
            no lump receive; continuing
            like nothing happened

            If I could compile u-boot to be able to correctly detect the flash chip, maybe I could solve the problem.

            Kind regards.

            PS: the openwrt kernel detects the flash chip
            Code:
            
            
            Code:
             physmap platform flash device: 00080000 at fff80000
            [   12.505812] physmap-flash.0: Found 1 x16 devices at 0x0 in 8-bit bank. Manufacturer ID 0x0000c2 Chip ID 0x0000b9
            [   12.516056] Amd/Fujitsu Extended Query Table at 0x0040
            [   12.521248]   Amd/Fujitsu Extended Query version 1.0.
            [   12.526300] physmap-flash.0: JEDEC Device ID is 0xB9. Assuming broken CFI table.
            [   12.533719] physmap-flash.0: Swapping erase regions for top-boot CFI table.
            [   12.540668] number of CFI chips: 1
            [   12.545398] Creating 1 MTD partitions on "physmap-flash.0":
            [   12.551032] 0x000000000000-0x000000080000 : "Full512kb"

            Zuletzt geändert von fratzicu; 28.07.2016, 00:00.

            Kommentar


            • Also, I tried connecting with jtag but with no success in detecting the cpu. I used zjtag and tiau usb adapter. I connected all wires, including trst and gnd, with no success. Do you have any clue on how to do it?

              Kommentar


              • Hi,
                I made a backup from openwrt of /dev/mtd0, /dev/mtd0ro and /dev/btdblock0; they are identical and have 512k, just like the flash chip. So I think the flash chip works, is labeled by openwrt as "Full512kb"
                Code:
                root@Hipserv:/dev# cat /proc/mtd
                dev:    size   erasesize  name
                mtd0: 00080000 00010000 "Full512kb"
                root@Hipserv:/dev#
                I shared the files here
                https://app.box.com/s/8o9fjjuqignf5csjfzml7czmcp99uey2
                So maybe if I could compile u-boot for this device and then compile openwrt with mtd write support, I could flash from within mtd?

                Kommentar


                • Zitat von fratzicu Beitrag anzeigen
                  Hi,
                  I made a backup from openwrt of /dev/mtd0, /dev/mtd0ro and /dev/btdblock0; they are identical and have 512k, just like the flash chip. So I think the flash chip works, is labeled by openwrt as "Full512kb"
                  Code:
                  root@Hipserv:/dev# cat /proc/mtd
                  dev:    size   erasesize  name
                  mtd0: 00080000 00010000 "Full512kb"
                  root@Hipserv:/dev#
                  I shared the files here
                  https://app.box.com/s/8o9fjjuqignf5csjfzml7czmcp99uey2
                  So maybe if I could compile u-boot for this device and then compile openwrt with mtd write support, I could flash from within mtd?
                  So what do you want to gain ???

                  Yes all three files are the same and must be.

                  The problem here is uBoot, you need a second partition in mtd
                  Erase size is 64k and your have 8 pages
                  -> 512k

                  I've lost in tracking the conversation.
                  So you booloader is working and and boots the normals system (Lacie ??)
                  And you want OpenWRT on this BOX ??
                  Patch OpenWRT against your BOX and run this from HDD.

                  Don't touch the bootloader, don't even think about this.
                  Some random kernel coder
                  Lots of stuff attached to serial console

                  Kommentar


                  • Follow up for previous post.

                    You need for simple hacking and discover your BOX
                    - git
                    - linux kernel source tree -> kernel.org
                    - buildroot source tree -> buildroot.org ??

                    Minimal setup (config) for both in known directories.
                    So the build system of can "catch" each other
                    i.e. this is my setup
                    Code:
                    ~/linux-master
                    ~/buildroot
                    Build buildroot as minimal initramfs size about 6 MB or less, cpio without compression
                    Build kernel with embedded initramfs, both can here set compressed Kconfig
                    Build kernel as uImage and attach appropriate DTB at the end

                    Boot via TFTP this Image
                    -> Fun, Profit

                    This is a hard way to go

                    If you know the disk layout, from an (old) running system.
                    To discover the layout do this:
                    Attach HDD to your PC run
                    Code:
                    file /dev/sdx*
                    Change /dev/sdx to your config.

                    Post this.

                    And post
                    Code:
                    cat /proc/cmdline
                    from running system
                    Some random kernel coder
                    Lots of stuff attached to serial console

                    Kommentar


                    • Thank you very much. I have already openwrt on this box. My problem is that after a power failure somehow the board doesn't boot unless there is a serial cable attached and reading from tty interface. Otherwise it stops after the bootloader at the bootdelay prompt, like a key was pressed to interrupt the boot process. So if I connect to the serial port and tye the "boot" command in the marvell bootloaser, it continue to boot. So I thpught that if I could set the bootdelay in the marvell bootloader to 0, then no interruption would occur, and the device would boot.I tried that, but the saveenv command doesn't work, as it seems the flash is not detected or writable. SO I thought that maybe a new bootloader would allow me to set the bootdelay to 0.

                      Thanks

                      Kommentar


                      • So your box is booting with the serial cable attached.
                        OK
                        Try this :
                        Boot your box *with* attached cable, but don't type anything into the serial console.
                        Maybe you must attach the serial cable to your PC via USB, to stable
                        TX on the USB side (which goes into RX on the NAS)

                        BUT don't enter *any* characters.

                        If this BOX is booting good.
                        Then you have a dangling RX line on your board.

                        The "bootdelay" command is for "catching" the serial prompt.
                        With 2 seconds a normal user have enough time ..
                        But with zero seconds you must be some kind of superman
                        to catch the right time.

                        If this is working, you need only a resistor to hardwire the RX line.
                        Maybe a plug for this, so you can switch between USB and hardwired RX
                        Some random kernel coder
                        Lots of stuff attached to serial console

                        Kommentar


                        • Hi,
                          I tried that, It doesn't continue booting, it still stops at the bootdelay prompt. It works only if I read from the serial port with putty or minicom.

                          SO by hardwire Rx line I connect it with a resistor to gnd or Vcc? What resistor should I use?

                          Kommentar


                          • Zitat von fratzicu Beitrag anzeigen
                            Hi,
                            I tried that, It doesn't continue booting, it still stops at the bootdelay prompt. It works only if I read from the serial port with putty or minicom.

                            SO by hardwire Rx line I connect it with a resistor to gnd or Vcc? What resistor should I use?
                            So if you connect via serial and don't do anything this thing will not boot . ??
                            And if you type one *any* character this works ??

                            I prefer for this test the SPACE key, no other.
                            CR and other key get you in the menu prompt.
                            Maybe TAB and/or ESC will work too.

                            Can you "unplug" the RX line from the NAS alone ??
                            Normaly yes if you have something like a of NOKIA CA42 or so cabel with four wires.
                            So you can see if it's working (via tracking the bootlog)

                            The resistor is about 3.3k or 4.7k is this range.
                            Some random kernel coder
                            Lots of stuff attached to serial console

                            Kommentar


                            • Hi,
                              So the device boots only if i connect the usb serial adapter, plug the usb part on my laptop usb port and start minicom or putty, without typing anything. just reading the serial output and the device gets past the boot prompt. Any other situation is not working. I'll try what you recommended in the last post


                              Hi,
                              Finally, it worked without rx line (pin7 disconnected). Great!
                              Zuletzt geändert von fratzicu; 02.09.2016, 19:55.

                              Kommentar

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